Case study

Demo chip for embedded ReRam module (Non-Volatile Memory or NVM)

Application:

Non-Volatile Memory (NVM) refers to a broad range of semiconductor technologies, usually embedded, that still holds data even after the device has been turned-off, allowing for the storage and availability of data. NVM are for example used to ensure the continuous function of embedded processors even after being powered back up.

A demo chip is, not surpisingly, designed to demonstrate the capabilities of the solution. It is a crucial step for any innovation as it allows customers to get a handle on the new technology in their own environment in order to design their requirements.

Customer request

Weebit Nano is a leading developer of next-generation semiconductor memory technology. The company developed a « new type of non-volatile (NV) random-access memory called ReRAM. ReRAM works by changing the resistance across a dielectric solid-state material rather than directly storing a charge. »

In order to allow its customers to properly adopt this innovative technology, Weebit Nano asked IC’Alps to implement the RTL code of a demo chip embedding its ReRAM module with a RISC-V microcontroller (MCU), system interfaces, memories and peripherals.

Weebit Nano’s embedded ReRAM module includes a 256Kb ReRAM array, control logic, decoders, IOs (Input/Output communication elements) and error correcting code (ECC).

The targeted technology was SkyWater’s 130nm CMOS process (S130).

Layout Demo chip for embedded NVM

Our approach

IC’Alps started by setting up the project environment (IP check, Design Kit installation, RTL acceptance).

The first step was to adapt the SkyWater S130 analog design kit for a digital flow with the design of .lib and .lef views and the design/characterization of a power cut cell.

With this digital physical implementation, IC’Alps, Weebit and SkyWater worked together on enhancing the process design kit available for other designs.

In addition to this work, IC’Alps has performed all physical tasks up the GDSII format ready for fabrication.

IC'Alps and Weebit Nano
"We were extremely pleased with IC’Alps’ work on our demo chip for SkyWater’s 130nm process. The IC’Alps team is highly skilled with all aspects of physical implementation, from RTL-to-GDS implementation to tape-out. They met schedule and quality targets, and the chip is fully functional."
Ilan Sever
Vice-President of R&D – Weebit Nano

ASIC features

SkyWater 130 nm CMOS

Embedded ReRAM Module

IO SkyWater

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