You are experienced with integrated electronics but need some support with your design?
We offer design services to complement your team and to accelerate your analog, digital or mixed-signal custom ASIC / SoC projects.
CIR accreditation to enable the eligibility of the R&D operations carried out by IC’Alps.
IC'Alps, a concentrate of skills
Analog design
Schematics
Testbench
Simulations w/wo mismatch
Etc.
Analog layout
Various design kits
Extractions
Sign-offs
Digital design
RTL coding (VHDL, Verilog, systemVerilog)
Testbench (System Verilog, SystemC, UVM)
Simulations w/wo analog modeling
Digital physical implementation
Synthesis
DfT
Floorplan
P&R
Sign-offs
A large experience to ensure first-time-right ASIC projects
Acting as an independent design house, you can rely on our in-house pool of highly-trained and skilled experts to provide you with the IC design services that perfectly match your project needs, budget and schedule.
Analog, Mixed-Signal, Digital
From 0.35 µm down to 16 nm
CMOS, BICMOS, Bulk, SOI, FDSOI, HVCMOS, BCD, etc.
TSMC, XFab, Tower Jazz, Global Foundries, ST, etc.
A-la-carte partnerships
From our design center in the Grenoble area, using our infrastructure and EDA licenses, we can handle any part of an IC design process, the choice is yours.
Possible IC design cooperation include:
- Performance assessment of ASIC libraries and IP in various technologies
- Digital partition from specification to layout (GDSII)
- RTL Design and Verification
- Layout activity
- RTL2GDSII at partition level, at top level
- Circuit architecture/partitioning definition and analysis
- Mixed-signal IC verification
- Failure analysis from silicon measurements and simulations results
- FPGA to ASIC migration
- Consultancy of expertise
Our IP library gives your design an edge and a head-start
To provide our customers with differentiated IC architectures and a quick turnaround time to market; our design projects generally combine in-house analog and digital blocks redeployed or designed from scratch, and some third party IPs in the areas of standard cells & IO, interfaces, power management, PLL/DLL, ADC/DAC, memory, MCU, etc.
The benefits of this approach are:
- Time saving through capitalization of our IP library and re-use of standard blocks
- Lower cost compared to full in-house design
- Reduced risk with silicon proven subsystems
- Best possible performance across a variety of technologies
A proven design methodology
From specification to silicon, our team has developed robust and trusted design flows to build flawless analog, mixed-signal or digital ASICs from beginning to end.
Our design flows are certified according to ISO 9001:2016, ISO 13485:2016, EN 9100:2018 quality standards.
Gain access to our ASIC specialists