IC’Alps does a first-time-right physical implementation for Weebit Nano

News, Technical papers

IC’ALPS announces the successful physical implementation of a chip design project for Weebit Nano, with the fully functional demo chip manufactured first-time-right and delivered for qualification. The demo chip, which integrates Weebit Nano’s embedded Resistive Random-Access Memory (ReRAM) module manufactured on SkyWater’s 130 nm CMOS process, is working as expected and achieving the targeted performances including speed, power and die size.

 

Téléchargez le communiqué de presse complet         Download the full press release [EN]

 

Weebit Nano Logo

We were extremely pleased with IC’Alps’ work on our demo chip for SkyWater’s 130nm process. The IC’Alps team is highly skilled with all aspects of physical implementation, from RTL-to-GDS implementation to tape-out. They met schedule and quality targets, and the chip is fully functional.

IC'Alps Logo

IC’Alps performed the physical implementation of the demo chip from Weebit Nano RTL code embedding its non-volatile memory block. This included successful adaptation of an analog technology design kit for a digital flow. We are obviously very happy with the results as the testing phase completed successfully.

Learn more about this project

IC'Alps and Weebit Nano
Share this post

Let’s get in touch with our Business Managers for an initial discussion or to request an ASIC Design Consultation!

Let’s get in touch with our Business Managers for an initial discussion or to request an ASIC Design Consultation!