Embedded FPGA (eFPGA) technology into ASICs allows engineers to combine the cost/power/performance benefits of an ASIC with the flexibility offered by FPGA (Field Programmable Gate Array) to make changes (hardware coded functions / equations) to their design in order to specifically answer the requirements of the end application.

Customer request

The customer performed a research program to create embedded FPGA with standard cells available in all design kits / libraries (no specific eFPGA cell).

The clear interest is to generate eFPGA only from a RTL netlist, making its implementation in an ASIC as easy as the implementation of a digital block, using already in place implementation flow & tools.

The customer wanted to have a demonstrator to show the performance and the feasibility of his technology.


Our approach

As with every single project, we approached this request with the highest quality standards in mind. Our skilled and experienced team started this project with a full and exhaustive analysis of the FPGA architecture code to confirm the integration as eFPGA into an ASIC circuit and to identify the list of potential specific FPGA IP to design.

Our second step, was to make some modifications into the FPGA code to map the used memories and to perform equivalence verification before and during the physical implementation.

We also supported the customer to size the matrix according to the targeted die size.

ASIC features

Purely digital

Standard cell library Layout

55 ULP process (ultra low power)

QFP208 package

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