Selecting the right IP components is a prerequisite to the success of a custom IC design project.
IC’Alps design projects generally combine in-house analog and digital IP components redeployed or designed from scratch, and some third party IP components in the areas of standard cells & IO, interfaces, power management, PLL/DLL, ADC/DAC, memory, MCU, etc.
This approach provides our customers with differentiated IC architectures and a quick turnaround time to market. It also reduces development risks and costs while ensuring first-time-right project execution.
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IP strategy
We avoid packaging and marketing our IP as standalone products to ensure our ASIC specifications are agnostic in regards to IP and technology choices.
Our IP solutions have been silicon verified in one or more technological nodes and are scalable and portable with respect to foundry’s specific manufacturing process.
We also delivers IP customization services to provide our customers with the IP solution that perfectly match their system requirements
In-house IP components
The following in-house IP components are available to our customers to complement our third-party IP partnerships
Our design team has been developing world-class IP solutions for use in custom analog or mixed-signal ASICs
- Oscillators
- Clock generators
- Linear regulators
- Sigma Delta ADCs
- SAR ADCs
- On-chip temperature monitors
- Analog Front-End (AFEs)
- Charge pumps
- Voltage references
- And many others…
We provide the soft IP and required expertise to uniquely combine hardware security features and low-power in a custom ASIC solution for the needs of IoT and medical applications, or more generally serving the need of unique identifier (such as a fingerprint) in either FPGA or ASIC technologies.
Our TRNG and PUF are based on asynchronous solutions, using only standard cells (no specific cells or memories), and providing performances (bit rate generation) > 100x than classical SRAM-based solutions
- STRNG (True Random Number Generator based on a Self-Timed Ring Oscillator)
- STRPUF (Physically Unclonable Function based on a Self-Timed Ring Oscillator)
- QSPI
- SPI controller
- I2C controller
- UART controller
Accelerate your ASIC design
Time Savings
Through capitalization of our IP library and re-use of standard blocks
Lower Costs
Compared to full in-house design
Reduced Risks
With silicon proven subsystems
Best Performance
Across a variety of technologies
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