{"id":6911,"date":"2020-04-28T11:40:18","date_gmt":"2020-04-28T09:40:18","guid":{"rendered":"http:\/\/icalps.votre-projet.com\/?page_id=6911"},"modified":"2025-09-24T06:20:50","modified_gmt":"2025-09-24T04:20:50","slug":"senior-digital-design-engineer-w-m","status":"publish","type":"page","link":"https:\/\/www.icalps.com\/fr\/careers-opportunities\/senior-digital-design-engineer-w-m\/","title":{"rendered":"Senior Digital Design Engineer (W\/M)"},"content":{"rendered":"\t\t<div data-elementor-type=\"wp-page\" data-elementor-id=\"6911\" class=\"elementor elementor-6911\" data-elementor-post-type=\"page\">\n\t\t\t\t<div class=\"elementor-element elementor-element-8303b62 e-flex e-con-boxed e-con e-parent\" data-id=\"8303b62\" data-element_type=\"container\" data-e-type=\"container\" data-settings=\"{&quot;jet_parallax_layout_list&quot;:[],&quot;background_background&quot;:&quot;classic&quot;}\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-c597b72 elementor-widget elementor-widget-sp-breadcrumbs\" data-id=\"c597b72\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"sp-breadcrumbs.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<nav  aria-label=\"Fil d&#039;Ariane\"><ol class=\"breadcrumb\" itemscope itemtype=\"https:\/\/schema.org\/BreadcrumbList\"><li class=\"breadcrumb-item active\" aria-current=\"page\" itemprop=\"itemListElement\" itemscope itemtype=\"https:\/\/schema.org\/ListItem\"><span itemprop=\"name\">Accueil<\/span><meta itemprop=\"position\" content=\"1\"><\/li><\/ol><\/nav>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t<div class=\"elementor-element elementor-element-0d4abf5 e-flex e-con-boxed e-con e-parent\" data-id=\"0d4abf5\" data-element_type=\"container\" data-e-type=\"container\" data-settings=\"{&quot;background_background&quot;:&quot;classic&quot;,&quot;jet_parallax_layout_list&quot;:[]}\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-05cd803 elementor-widget elementor-widget-heading\" data-id=\"05cd803\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h1 class=\"elementor-heading-title elementor-size-default\">Senior Digital Design Engineer (W\/M)<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t<div class=\"elementor-element elementor-element-fbfa162 e-flex e-con-boxed e-con e-parent\" data-id=\"fbfa162\" data-element_type=\"container\" data-e-type=\"container\" data-settings=\"{&quot;jet_parallax_layout_list&quot;:[]}\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-c277b9c elementor-widget elementor-widget-text-editor\" data-id=\"c277b9c\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p>As subsidiary of an industrial group based in Grenoble, IC\u2019Alps designs analog and digital integrated circuits (\u201cASIC \u2013 Application Specific Integrated Circuit\u201d) for the other units of the group and external customers: 50% for medical applications, and 50% for consumer, automotive, industrial and other markets\u2026 Bringing together recognized experts in France, we are experiencing rapid growth and, to reinforce our digital team, are looking for:<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-5f1bfcc elementor-widget elementor-widget-heading\" data-id=\"5f1bfcc\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h2 class=\"elementor-heading-title elementor-size-default\">Senior Digital Design Engineer (W\/M)\n<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-68fa49e elementor-widget elementor-widget-heading\" data-id=\"68fa49e\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h3 class=\"elementor-heading-title elementor-size-default\">Your missions<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-9b75595 elementor-widget elementor-widget-text-editor\" data-id=\"9b75595\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<ul><li><p>Consolidating the link between digital design and physical implementation, a fundamental position in the constant search for being right at the first path.<\/p><p>In a team of 10-12 digital designers (concentrating design, verification, and physical implementation skills) and in the frame of projects for mixed ASIC (analog\/digital):<\/p><ul><li>You study, specify and design digital blocks, sub-systems (e.g. around an embedded processor or a memory sub-system\u2026) and\/or top level, making area\/power estimations<\/li><li>You elaborate testability insertion strategy corresponding to the circuit specifications<\/li><li>You perform verification tasks (coverage rate, unit block simulation, complete system simulation, mixed analog \/ logic simulation, functional and test modes\u2026) until the generation of test patterns for silicon measurements in our lab.<\/li><li>You improve the digital design, functional and test mode verification flow<\/li><li>You perform digital synthesis and Design for Test (DfT), using techniques that reduce the difficulty and cost associated when testing an integrated circuit (with the use on scan compression, built-in self-test (BIST) or increased observability using JTAG\u2026)<\/li><li>You lead, debate and present the choice of architectures and design status during review meetings within the ASIC project team and in front of customers.<\/li><\/ul><\/li><\/ul>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-4fd5e37 elementor-widget elementor-widget-heading\" data-id=\"4fd5e37\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h3 class=\"elementor-heading-title elementor-size-default\">Your Profile<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-4d11c93 elementor-widget elementor-widget-text-editor\" data-id=\"4d11c93\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<ul><li>Engineering degree (or equivalent) in microelectronics<\/li><li>First significant experience (&gt; 5 years) in Front-end ASIC digital design in VHDL and\/or Verilog and\/or SystemVerilog, and in digital synthesis for DFT<\/li><li>Comfortable in scripting (python, tcl, \u2026)<\/li><li>Experience with seeing a project through from beginning to completion with strong customer interaction<\/li><li>Excellent analytical and problem-solving skills<\/li><li>Ability to work independently but with a strong team spirit, while being a real force of proposals<\/li><li>Leadership and strong written and verbal communication skills<\/li><li>Curiosity, interest for final applications, rigor and requirement in the quality of work<\/li><li>Fluent English \/ Nice to have: French<\/li><li>Bonuses: knowledge of different tools (Mentor, Synopsys, Cadence), design in different languages (SystemVerilog, VHDL, \u2026), experience in mixed ASIC environment.<\/li><\/ul>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-e1354fc elementor-widget elementor-widget-heading\" data-id=\"e1354fc\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h3 class=\"elementor-heading-title elementor-size-default\">Conditions<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-3db3332 elementor-widget elementor-widget-text-editor\" data-id=\"3db3332\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<ul><li>Type of employment: permanent, full time<\/li><li>Location: Grenoble (Saint Martin d&rsquo;H\u00e8res) \u2013 France<\/li><li>Salary: competitive package, depending on the profile<\/li><\/ul><p>The most of the position:<br \/>You will join a group in which you can have an impact, with growing perspectives, fast and reactive in its decisions. Our team members are ambitious in their objectives, opened in their operation. And the working environment is pleasant!<\/p><p>So, if you like to join a design team fully dedicated to the success of the project, from the requirements specifications serving customers\u2019 applications, to the measurements on silicon and the production monitoring, if you are curious and motivated to learn new skills and share your own, do not hesitate!<\/p><p>Join a dynamic company to take technical challenges as a team, in designing integrated circuits for diverse application needs, and apply by sending us your resume and cover letter.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-2f8559e elementor-widget elementor-widget-button\" data-id=\"2f8559e\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"button.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<div class=\"elementor-button-wrapper\">\n\t\t\t\t\t<a class=\"elementor-button elementor-button-link elementor-size-sm\" href=\"https:\/\/www.icalps.com\/careers-opportunities\/submit-your-resume\/\">\n\t\t\t\t\t\t<span class=\"elementor-button-content-wrapper\">\n\t\t\t\t\t\t\t\t\t<span class=\"elementor-button-text\">Submit your resume<\/span>\n\t\t\t\t\t<\/span>\n\t\t\t\t\t<\/a>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"<p>Discover the \u00ab\u00a0Senior Digital Design Engineer (W\/M)\u00a0\u00bb job offer and apply now<\/p>\n","protected":false},"author":8,"featured_media":0,"parent":6189,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"elementor_header_footer","meta":{"_seopress_robots_primary_cat":"","_seopress_titles_title":"%%title%% job offer","_seopress_titles_desc":"Discover the \"Senior Digital Design Engineer (W\/M)\" job offer and apply now","_seopress_robots_index":"","footnotes":""},"class_list":["post-6911","page","type-page","status-publish"],"_links":{"self":[{"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/pages\/6911","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/users\/8"}],"replies":[{"embeddable":true,"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/comments?post=6911"}],"version-history":[{"count":0,"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/pages\/6911\/revisions"}],"up":[{"embeddable":true,"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/pages\/6189"}],"wp:attachment":[{"href":"https:\/\/www.icalps.com\/fr\/wp-json\/wp\/v2\/media?parent=6911"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}